基于FPGA的小型無人機通信干擾系統設計與實現

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摘 要：針對無人機快速發(fā)展帶來的黑飛無人機、無人機擾民等問題，以直接式數字頻率合成為技術原理，提出一種基于通信干擾的無人機干擾系統，選擇現場可編程門陣列作為核心芯片，設計無需鏡像抑制算法和濾波器的雙邊帶發(fā)射干擾硬件結構。相關測試驗證了本系統的可行性和有效性。

關鍵詞：直接式數字頻率合成；無人機；通信干擾；系統設計；現場可編程門陣列

中圖分類號：TN972  文獻標志碼：A  文章編號：1671-5276（2024）05-0122-04

Design and Implementation of Communication Jamming System for Small UAV Based on FPGA

Abstract：To deal with the problems such as unauthorized UAV and UAV disturbing people due to the rapid development of UAV， according to the technical principle of direct digital frequency synthesis， proposes a UAV jamming system based on communication jamming. Field programmable gatee array is selected as the core chip to design a dual sideband jamming emitting hardware structure without image suppression algorithms and filters. And the feasibility and effectiveness of the proposed system is verified by relevant tests.

Keywords：direct digital frequency synthesis；UAV；communication jamming；system design； FPGA

0 引言

現在許多領域都需要使用無人設備進行探索，隨著無線電技術的發(fā)展，使得無人機的身影隨處可見，如利用無人機來運送快遞、無人機的燈光秀表演、無人機災后搜救等。（剩余3661字）